[^:]*: Assembler messages:
[^:]*:6: Error: bad type in SIMD instruction -- `vmullb.s64 q0,q1,q2'
[^:]*:7: Error: bad type in SIMD instruction -- `vmullb.f16 q0,q1,q2'
[^:]*:8: Error: bad type in SIMD instruction -- `vmullb.f32 q0,q1,q2'
[^:]*:9: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:10: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Error: bad type in SIMD instruction -- `vmullt.s64 q0,q1,q2'
[^:]*:7: Error: bad type in SIMD instruction -- `vmullt.f16 q0,q1,q2'
[^:]*:8: Error: bad type in SIMD instruction -- `vmullt.f32 q0,q1,q2'
[^:]*:9: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:10: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Error: syntax error -- `vmullbeq.s32 q0,q1,q2'
[^:]*:19: Error: syntax error -- `vmullbeq.s32 q0,q1,q2'
[^:]*:21: Error: syntax error -- `vmullbeq.s32 q0,q1,q2'
[^:]*:23: Error: instruction missing MVE vector predication code -- `vmullb.s32 q0,q1,q2'
[^:]*:24: Error: vector predicated instruction should be in VPT/VPST block -- `vmullbt.s32 q0,q1,q2'
[^:]*:26: Error: syntax error -- `vmullteq.s32 q0,q1,q2'
[^:]*:27: Error: syntax error -- `vmullteq.s32 q0,q1,q2'
[^:]*:29: Error: syntax error -- `vmullteq.s32 q0,q1,q2'
[^:]*:31: Error: instruction missing MVE vector predication code -- `vmullt.s32 q0,q1,q2'
[^:]*:32: Error: vector predicated instruction should be in VPT/VPST block -- `vmulltt.s32 q0,q1,q2'
